Suppose we have a 16-block cache. Each block of the cache is one word wide. When a given program is executed, the processor reads data from the following sequence of decimal addresses:
0,15,2,8,14,15,26,2,0,19,7,10,8,14,11
. Show the contents of the cache at the end of the above reading operations if: - The cache is directly mapped - The cache is a 2-way set associative - The cache is a 4-way set associative - The cache is a fully associative Note: The content address 0 can be shown as [0]. Assume LRU replacement algorithm is used for block replacement in the cache, and the cache is initially empty.