You are given a design board with four input pins a 4-bit INDATA,
1-bit Load,Enable, and Clock; and one output, a 4-bit OUTDATA.
Build a sequential circuit that contains a register (Don’t forget to
trigger that register by the FALLING edge of the clock, Logisim’s default
is the opposite!).
The register is updated every clock cycle in which Enable is up. If
Load is down, the register is incremented, otherwise it is loaded with the
data asserted on the INDATA pin.
The register data output should be connected with the output pin
OUTDATA.