Which of these is the Verilog expression for the effective address of a load word (Iw) or store word (sw) instruction? The effective address is the memory address where the word will be loaded from or stored into. A. R[rs] + {16{immediate[15]}, immediate} B. R[rd] + {16{immediate[15]}, immediate} C. PC + 4 + {16{immediate[15]}, immediate} D. R[rs] + R[rd] E. R[rs]