A circuit has four inputs RSTU and four outputs VWYZ. RSTU represents a Binary Coded Decimal digit VW represents the quotient and YZ the remainder when RSTU is divided by 3 (VW and YZ represent 2-bit binary numbers). Assume that invalid inputs do not occur. Realize the circuit using(a) a ROM
(b) a minimum two-level NAND-gate circuit
(c) a PLA (specify the PLA table)